At a glance
| Booth | K3367 |
| Country | JP |
| Website | www.tesec.co.jp/en |
Company profile
Tesec Corporation is a power-semiconductor test-equipment manufacturer established on December 22, 1969, with 211 employees as of March 2026 and operations that include a corporate headquarters in Tokyo, an Ina factory in Nagano, and a Kumamoto office. Its business is the manufacturing of semiconductor production equipment, handlers, testers, and integrated systems, and the company describes more than 50 years of work in power-semiconductor testing. Tesec's high-voltage and high-current measurement technologies support testers across power-device formats from wafers and chips through packages and modules, covering both static and dynamic characterization requirements. The company pairs its test systems with a range of handlers and lists Film Frame Test Handler, Die Sorter, Gravity Handler, MEMS Handler, TAB Handler, Discrete Device Test System, IPD/IPM Test System, Thermal Resistance Tester, Inductive Load Tester, and Dynamic Test System among its equipment categories. Its overseas operations include TESEC, INC. in the United States with California and Arizona offices, TESEC (M) SDN. BHD. in Malaysia, and TESEC CHINA (Shanghai) CO., LTD. in China, supporting its international semiconductor-equipment business.
Exhibits
The 471-TT Version LA is a fully automated wafer-level CP-process test system for SiC MOSFETs, GaN FETs, Si MOSFETs, and IGBTs, combining DC static-characteristic testing with inductive-load UIS and avalanche-ruggedness testing for SiC/GaN power semiconductors. Its DC measurements include breakdown voltage Vds/Vdss, leakage current IDSS, threshold voltage Vgs(th), and on-resistance Rds(on), and the system is designed to measure multiple chips simultaneously during wafer processing. The 471-TT standard configuration supports 1.2 kV / 65 A, or 130 A for C-E, and can be expanded to 2.2 kV / 65 A, or 200 A for C-E; with an optional unit, measurement up to 10 kV / 1200 A is available. Tesec positions the simultaneous multi-chip measurement concept as a productivity improvement over conventional testers while retaining its high-voltage and high-current measurement approach for discrete semiconductor static characteristics. The 530-IT IPD/IPM Test System combines concepts from IC testers with Tesec's power-device measurement technology to address IPD/IPM devices that integrate logic ICs and power devices, as well as other device types. For gravity handling, the LT4530 series is offered in two configurations: LT4530T with eight sites, hot and cold temperature testing, high-frequency contacts, and high-throughput operation, and LT4530D with four sites and hot-temperature testing. LT4530T reaches a listed maximum of 28,000 UPH with eight sites using a 0.9-second index time with no loader or unloader downtime, while LT4530D reaches 18,000 UPH with four sites and a 0.6-second index time under zero-test-time conditions. The LT4530T temperature range is -55 °C to 155 °C, including 30 °C to 155 °C at ±2 °C, while LT4530D covers 30 °C to 155 °C at ±2 °C. Both configurations target TSSOP, SOP, and MSOP packages, use magazine carriers and socket contact, and provide tester interfaces including TTL Parallel, GP-IB, and RS-232C/P849. The handler design emphasizes prevention of jams and lead deformation to maintain utilization, with the LT4530T combining this reliability approach with eight-site throughput and a wider hot-and-cold test range.
Capabilities and products
- film-frame test handlers
- die sorters
- gravity handlers
- MEMS handlers
- TAB handlers
- discrete-device test systems
- IPD/IPM test systems
- thermal-resistance testers
- inductive-load testers
- dynamic test systems