At a glance
| Booth | I2900 |
| Country | JP |
| Website | www.kiyokawa.co.jp |
Company profile
KIYOKAWA PLATING INDUSTRY CO.,LTD was established in 1963 and reports more than 35 years of plating-technology experience for the electronics industry, including surface-mount devices, printed wiring boards and rare-earth magnets. The company offers electroless UBM plating on electrodes formed on semiconductor wafers and states that it has 15 years of experience with UBM plating. For through-silicon-via applications, KIYOKAWA PLATING INDUSTRY CO.,LTD has via-filling technology for interposer silicon wafers and describes the filling as void-free. Its micro-bump plating capability covers an integrated process for 20 micrometer-scale micro-bump fabrication from sputtering through the reflow process. The company also applies plating technology to powder-form materials to add new functions to those materials. KIYOKAWA PLATING INDUSTRY CO.,LTD accepts plating work from the trial-production stage, allowing customers to use its plating capabilities during process and product development rather than only after mass-production conditions have been fixed.
Exhibits
KIYOKAWA PLATING INDUSTRY CO.,LTD provides internal-via plating for TSV silicon through electrodes and TGV glass through electrodes used to connect upper and lower chips in 3D packaging. Its proprietary plating method is described as enabling void-free via-fill plating not only for silicon and glass wafers but also for through vias in ceramic and resin substrates. The listed wafer-via service covers 4-inch to 8-inch wafers and materials including Si, SiC and glass, with electrolytic copper and electrolytic nickel shown among trial-production results. For electrolytic copper, the page lists high-frequency characteristics, higher density, miniaturization and lower power consumption, while electrolytic nickel is associated with higher density and miniaturization. Compared with a conventional via-fill flow that requires CMP removal of plated material deposited on both wafer surfaces, the company's proprietary process suppresses front- and back-surface deposition and is described as substantially reducing CMP polishing time. The company states that its method can handle multiple through-via shapes, including straight, necked, tapered and uneven-wall profiles, while noting that filling quality can vary with via shape. A listed production-history range for through-via fill is approximately Φ30 to 50 μm in via diameter and approximately 200 to 300 μm in wafer thickness, with conditions evaluated using actual samples because results depend on via geometry. For blind vias, the company states that fill plating is more difficult than conformal plating but may be possible depending on via dimensions and process-condition development. Its non-destructive analysis uses X-ray CT to inspect the fill condition inside vias without destroying the sample, with sample sizes supported from chip scale up to a maximum of 300 mm square. Additional evaluation methods include laser microscopy and cross-section analysis, and the company presents non-destructive analysis as a way to support reliability improvement while reducing evaluation time and sample quantity. When complete via filling is not required and electrical continuity is the goal, KIYOKAWA PLATING INDUSTRY CO.,LTD offers conformal plating that can deposit uniformly on via sidewalls and bottoms where sputtering cannot reach. The conformal-plating page shows a blind-via cross-section example with aspect ratio 8, a via diameter of 5 μm and depth of 40 μm, and states that conformal plating can also reduce plating time compared with via-fill plating. For the different via geometries and plating conditions, the company states that metal species can be discussed according to the customer's requirements. These TSV and TGV plating capabilities are presented for interposers used in semiconductor IC chip stacking and for three-dimensional mounting substrates.
Capabilities and products
- electroless UBM plating on semiconductor wafer electrodes
- void-free TSV/TGV via-fill plating
- integrated plating process for 20 μm micro-bump fabrication
- functional plating of powder-form materials
- uniform conformal plating on via sidewalls and bottoms
- non-destructive X-ray CT inspection of via fill
- non-destructive analysis for samples up to 300 mm square
- plating services from the trial-production stage
- through-via plating for ceramic and resin substrates
- via-fill plating with reduced surface deposition to shorten CMP