At a glance
| Booth | K2268 |
| Country | US |
| Website | ACMR.com |
Company profile
ACM Research Inc. was founded in California in 1998 to supply capital equipment to the global semiconductor industry. ACM Research Inc. provides product development, manufacturing and product support through subsidiaries in Shanghai, China and Inchon, South Korea, while its global sales and service organization supports customers throughout Asia, North America and Europe. Its multi-product portfolio supports IC, compound semiconductor, wafer-level packaging and wafer manufacturing applications, and its experience with industry leader customers covers advanced technology nodes for wafer sizes up to 12 inches. Its processing portfolio includes single-wafer and batch wet cleaning, electroplating, thermal deposition, stress-free polishing, PECVD, ALD and track equipment, with customized tool and process solutions intended to improve productivity, efficiency and yield at low cost of ownership. ACM Research Inc. states that its IP portfolio includes more than 448 internationally granted patents and that it provides service and support around the globe. As device dimensions shrink, wet cleaning is used to remove submicron particulates and contaminants, with both single-wafer and batch cleaning technologies used in semiconductor manufacturing. SPM wafer cleaning removes organic contaminants from post-etch substrates and ion-implanted films and is also used for platinum silicide residue removal; photoresist residue and particulates can reduce yields in large-die AI chips. The ACM Planetary Family groups its process-aligned semiconductor manufacturing portfolio into eight series spanning essential stages in front-end processing and advanced packaging. For wafer-level and panel-level packaging, ACM Research Inc. describes growing use of specialized process technologies as device architectures move toward heterogeneous integration and chiplet-based designs, including wet processing, electrochemical plating and PECVD.
Exhibits
ACM Research Inc. develops, manufactures and sells production equipment and provides service solutions for single-wafer or batch wet cleaning, electroplating, stress-free polishing, PECVD, track and thermal processes. Smart Megasonix provides thorough cleaning across the wafer without damaging device features and allows precise control of megasonic power intensity and distribution. For flat and patterned wafers, proprietary SAPS technology uses alternating phases of megasonic waves to deliver uniform energy at a microscopic level and remove random defects more efficiently than conventional jet-spray processes. TEBO technology provides precise multi-parameter control of bubble cavitation during megasonic cleaning for 2D patterned chips and 3D structures including FinFET, DRAM, 3D NAND and 3D cross-point memory. For TSV copper overburden and FOWLP wafer-warpage challenges, stress-free polishing is used as an electrochemical copper-removal step before CMP, and the Ultra SFP family is designed to reduce stress, damage and defect formation while supporting more uniform downstream planarization. The Ultra C Tahoe cleaning system applies SPM cleaning while reducing the amount of sulfuric acid required, lowering chemical and post-process waste-treatment costs. The Ultra ECP map is configured with ACM Research Inc.'s Multi-Anode Partial Plating function on its electrochemical plating technology. Its wet-process portfolio covers precision cleaning, surface preparation, etch, photoresist strip, metal lift-off, coating and developing, with products including Ultra C SAPS, Ultra C TEBO, Ultra C Tahoe, Single Hot SPM, Bevel ETCH, Ultra C b, Ultra C wb, Metal Lift Off, Post CMP Clean, Ultra C s, Ultra C ct, Ultra C dv, Ultra C we, Ultra C pr, Ultra C vac-p Flux Cleaning Tool, Ultra C bev-p tool and Ultra C vac Cleaning Tool. Wet-process equipment is offered in batch and single-wafer configurations; applications include cleaning before oxidation or annealing, deposition and lithography, cleaning after etch and dry ash, removal of photoresist, particulates and metal contamination, and removal of sacrificial oxide and nitride layers. The wet-processing guidance also covers chemistries such as SPM, SC1 and SC2, megasonic cleaning for deep-trench or gate-all-around features, planar-surface batch stripping and cleaning, and backside etching that leaves the front side untouched. The Ultra ECP product line supports dual-damascene structures, TSVs, wafer-level packaging and compound semiconductor manufacturing, and can plate Cu, Ni, SnAg and gold for vias, pillars, bumps and redistribution layers. Its electrochemical plating technologies include multizone anodes, rubber-seal plating chucks, partial pulse plating, vacuum pre-wetting and paddle technologies; the line includes Ultra ECDP, Ultra ECP map, Ultra ECP 3d, Ultra ECP ap, Ultra ECP G-III and Ultra ECP ap-p. For copper electroplating, the described process controls electrolyte composition, current distribution and agitation, with copper sulfate, sulfuric acid, chloride ions, suppressors, levelers and accelerators among the key bath components and with current density, copper-ion concentration, agitation and temperature treated as key electrochemical conditions. Thermal processing includes 300mm batch tools for APCVD, LPCVD and ALD, plus un-doped poly deposition, doped poly deposition, gate-oxide deposition, high-temperature oxidation and high-temperature annealing; Ultra Fn, Ultra FnA and Ultra FN Atmospheric Pressure Oxidation/Anneal are listed furnace systems. The Ultra Furnace System combines software, hardware and process-control IP for stable control of temperature, pressure and gas flow rate, while thermal ALD is described for gate dielectrics, diffusion barriers and other thin films with film-thickness, doping and conformality control. Thermal CVD applications include silicon dioxide, silicon nitride, polysilicon, tungsten, SiC and GaN, and the thermal-processing guidance contrasts batch processing, often with 25 or more wafers, with single-wafer processing and discusses SiC chamber components for furnaces operating above 1000°C. The 300mm lithography track platform supports i-line, KrF and ArF processes by performing coating and developing sequentially on one tool; listed systems include Ultra Lith KrF, Ultra Lith Track and Ultra Lith BK. PECVD tools are presented for 28nm and above logic and memory applications, supporting thick- and thin-film deposition with direct liquid-precursor delivery, multiple heaters and controls intended to improve film uniformity, reduce film stress and improve particle performance; listed systems include PECVD SiCN and Ultra Pmax™. For compound semiconductor manufacturing, ACM Research Inc. adapts wet-process equipment for SiC wafer and device manufacturing, with listed tools including Ultra C vac-p Flux Cleaning Tool, Ultra SiC Cleaning Tool, Ultra C SAPS, Ultra ECP G-III, Ultra C we, Ultra C pr, Ultra C ct and Ultra C dv. For wafer-level packaging, its offering includes customized single-wafer tools for back-end assembly and packaging, a fully automated Coater with an auto-clean module, a Developer with three photoresist developing methods, a Stripper integrating batch and single-wafer processing, and a high-speed ECP system for pillar, bump and RDL plating. Its wafer-level packaging product list includes Ultra ECDP, Ultra C b, Ultra ECP ap, Ultra C ct, Ultra C dv, Ultra C we, Ultra C pr, Metal Lift Off, Ultra SFP, Ultra C s and Ultra C vac Cleaning Tool. For fan-out panel-level packaging, the Ultra C vac-p Flux uses vacuum-based cleaning, the Ultra ECP ap-p supports pillar, bump, RDL, fan-out and TGV processes with up to 16 plating chambers for copper, nickel, tin-silver, gold and other materials, and the Ultra C bev-p performs bevel etch and copper removal. The Ultra ECP ap-p handles organic and glass substrates sized 510 x 515 mm2 and 600 x 600 mm2 and manages cover warpages up to 7 mm; FOPLP is described for markets including smartphones, tablets, wearable devices, automotive electronics, 5G infrastructure, AI and HPC. For wafer manufacturing and reclaim, wet benches and SAPS tools support etch, CMP and cleaning in wafer production and can be configured to strip films from test wafers so the wafers can be reused several times; listed systems include Ultra C SAPS, Post CMP Clean and Ultra C wb.
Capabilities and products
- single-wafer and batch wet-cleaning equipment
- SAPS megasonic wafer cleaning
- TEBO megasonic cleaning for 3D structures
- SPM wafer cleaning
- semiconductor electrochemical plating (ECP) systems
- stress-free polishing (SFP)
- 300 mm LPCVD / ALD / oxidation and annealing furnaces
- i-line / KrF / ArF lithography coating/developing track systems
- PECVD thin-film deposition equipment
- wafer wet etching
- photoresist stripping
- metal lift-off process equipment
- post-CMP wafer cleaning
- wafer-level packaging wet-process equipment
- fan-out panel-level packaging plating and cleaning equipment
- SiC compound-semiconductor wet-process equipment
- test-wafer film stripping for reclaim