At a glance
| Booth | T9404 |
| Country | JP |
| Website | www.elephantech.co.jp |
Company profile
AI is pushing semiconductor packaging beyond the limits of conventional manufacturing. As AI accelerators, chiplets, and heterogeneous integration advance, the industry faces challenges in high-aspect-ratio vias, fine-line interconnects, glass-core substrates, process complexity, cost, and scalability. Elephantech addresses these challenges with proprietary 15-nm-class Self-Assembling Copper Nanoparticle technology. Its portfolio includes Nano Copper Deposition, DeepVia™ for high-aspect-ratio via metallization, DS-SAP™ for advanced substrate wiring, and SAphire™ copper nanopaste for TGV filling and low-temperature copper sintering. These technologies complement existing processes while reducing material use, simplifying manufacturing, improving reliability, and enabling higher-density packaging for AI and HPC. This presentation introduces Elephantech’s latest solutions and explores collaboration with semiconductor manufacturers, substrate suppliers, and research partners.
Exhibits
Provides 15-nm-class Self-Assembling Copper Nanoparticle technology. Its portfolio includes Nano Copper Deposition, DeepVia™ for high-aspect-ratio via metallization, DS-SAP™ for advanced substrate wiring, and SAphire™ copper nanopaste for TGV filling and low-temperature copper sintering.
Capabilities and products
- 15-nm-class Self-Assembling Copper Nanoparticle technology
- DeepVia for high-aspect-ratio via metallization
- DS-SAP for advanced substrate wiring
- SAphire copper nanopaste for TGV filling
- Nano Copper Deposition
- higher-density packaging for AI and HPC
- glass-core substrates