At a glance
| Booth | I3000 |
| Country | TW |
| Website | novomorphic.com |
Company profile
NOVOMORPHIC LTD is a UK semiconductor design company based in Wales and focused on System-First Edge AI. The company designs chips and electronic systems together so edge devices can sense, decide, and act locally rather than depending on remote processing. Its system-first work is defined around tight power, thermal, RF, latency, safety, security, and reliability constraints that must be considered together at the device and system level. The stated engineering capability includes system architecture, digital integrated-circuit design, mixed-signal design, radio-frequency design, and design of high-speed interfaces, allowing those disciplines to be addressed within the same System-First Edge AI engineering scope. The technical scope further includes SoC subsystem design, FPGA prototyping, embedded-system development, and AI hardware acceleration as explicit parts of the company’s semiconductor and electronic-system capability. Power-aware design and hardware/software co-design are also explicit capabilities, so power considerations and the division of functions between hardware and software are handled within the overall system-first design approach. Project work starts from requirements and can continue through architecture, system partitioning, prototyping, verification, and delivery support as successive stages of the engineering engagement. The company describes its engineering approach as defining the system constraints first, making design trade-offs explicit, and building toward measurable outcomes. NOVOMORPHIC LTD is backed by Cadence, CSA Catapult, and the Welsh Government, and it is a Cadence Design Network Partner. It supports customers in advanced electronics, telecoms, automotive, defence, industrial, and energy applications.
Exhibits
Its System-First Edge AI offering starts with system architecture and treats the chip and the surrounding electronic system as a coordinated design problem. Custom ASIC and SoC development covers RTL implementation and verification as part of the development path. The same ASIC and SoC development path includes FPGA prototyping and continues through physical realisation, connecting the RTL and verification stages to implementation within the stated development scope. This development scope is complemented by the company’s mixed-signal, RF, high-speed-interface, embedded-system, AI-acceleration, power-aware, and hardware/software co-design capabilities when those disciplines are required by the system. The delivery process can therefore connect requirements, architecture, partitioning, prototyping, verification, and delivery support within one system-first engineering workflow.
Capabilities and products
- Edge AI chip and electronic-system co-design
- ASIC/SoC development from RTL through verification and FPGA prototyping
- mixed-signal, RF, and high-speed interface design
- AI hardware acceleration
- hardware/software co-design