At a glance
| Booth | I3000 |
| Country | GB |
Company profile
Heronic Technologies is automating the design of bespoke AI-semiconductor hardware. Drawing on many years of research into hardware acceleration of AI algorithms at Imperial College London, the team are redesigning the next generation of AI processors by addressing the compute occupancy limitations of current AI chips at an architectural level. Heronic offers a portfolio of specialised Semiconductor IP for specific applications and optimised for deployment on FPGA and ASIC designs, with customisable objectives ranging from low-latency to resource-minimal strategies. Using their custom design-automation toolflow, MOSAIC, Heronic discovers the optimal accelerator design for a target AI application and technology pair, ensuring peak efficiency and a faster time to market. The team has produced numerous publications in top-tier conferences and journals, achieving state-of-the-art performance in object detection, human action recognition and image classification on FPGA devices, alongside award-winning results from AMD and a state-of-the-art result on MLCommons' MLPerf Tiny benchmark. As an Altera Solutions Acceleration Partner, Heronic has co-published a whitepaper demonstrating 1.9× greater performance over Nvidia devices 34 x lower latency, and 28x compute efficiency. Taiwan's position at the heart of the global semiconductor supply chain makes it a natural ecosystem for Heronic who is seeking partners in Taiwan to bring efficient, automated AI acceleration into next-generation FPGA and ASIC-based systems. Seeking collaborations with Fabless SoC and ASIC companies building chips for real-time video and audio processing, OEMs developing systems that incorporate FPGA devices, ODM partners for developing FPGA-based processing systems, and Sales reps and distributors for semiconductor IP EDA and IP ecosystem partners.
Exhibits
Provides specialized semiconductor IP for specific applications, optimized for deployment on FPGA and ASIC designs with customizable objectives such as low latency or minimal resource use. Its MOSAIC design-automation toolflow identifies an optimal accelerator design for a target AI application and technology pair.
Capabilities and products
- automating the design of bespoke AI-semiconductor hardware
- specialised semiconductor IP for specific applications
- MOSAIC custom design-automation toolflow
- customisable objectives from low-latency to resource-minimal
- state-of-the-art performance in object detection and action recognition
- 1.9x greater performance and 34x lower latency than Nvidia devices
- Altera Solutions Acceleration Partner
- state-of-the-art result on MLCommons' MLPerf Tiny benchmark